#ifndef _CHIP_S3821_H_
#define _CHIP_S3821_H_

#define GPIO_REG                    0xb8000430  //gpio0 ~ gpio31
#define GPIOA_REG                   0xb8000434  //gpio32 ~ gpio63
#define GPIOB_REG                   0xb8000438  //gpio64 ~ gpio95
#define GPIOC_REG                   0xb800043c  //gpio96 ~ gpio127
#define GPIOD_REG                   0xb8000440  //gpio128 ~ gpio136

#define PIM_MUX_BASE                0xb8000000
#define PIN_MUX_REG_MASK            0xfff00000
#define PIN_MUX_REG_SHIFT           20
#define PIN_BIT_HEIGHT_MASK         0x0000ff00
#define PIN_BIT_LOW_MASK            0x000000ff
#define PIN_BIT_HEIGHT_SHIFT        8
#define PIN_BIT_LOW_SHIFT           0

#define PIN_MUX_CTRL                (0x488 << PIN_MUX_REG_SHIFT)
#define PIN_MUX_CTRL1               (0x48C << PIN_MUX_REG_SHIFT)
#define PIN_MUX_CTRL2               (0x490 << PIN_MUX_REG_SHIFT)
#define PIN_MUX_CTRL3               (0x494 << PIN_MUX_REG_SHIFT)


//#define PIN_MUX_CTRL                (0xa8 << PIN_MUX_REG_SHIFT)
//#define PIN_MUX_CTRL1               (0xac << PIN_MUX_REG_SHIFT)

    
// Reg addr | reserved | end bit:bit_num<<8(bit8~15) | start bit:bit_num<<0(bit0~7)

#define IF_AGC_QAM_SEL				(PIN_MUX_CTRL | 27)
#define IF_AGC_T2_SEL				(PIN_MUX_CTRL | 26)
#define TUN_AGC_QAM_SEL				(PIN_MUX_CTRL | 25)
#define TUN_AGC_T2_SEL			    (PIN_MUX_CTRL | 24)
#define SMART_CARD_SEL2				(PIN_MUX_CTRL | 19)
#define I2C2_SEL				    (PIN_MUX_CTRL | 18)
#define QAM_IF_AGC_SEL              (PIN_MUX_CTRL | 17)
#define QAM_IF_AGC_SEL2				(PIN_MUX_CTRL | 16)
#define QAM_TUN_AGC_SEL				(PIN_MUX_CTRL | 15)
#define SPDIF2_SEL			        (PIN_MUX_CTRL | 14)
#define I2C3_SEL				    (PIN_MUX_CTRL | 13)
#define T2_IF_AGC_SEL				(PIN_MUX_CTRL | 12)
#define I2C4_SEL				    (PIN_MUX_CTRL | 11)
#define T2_IF_AGC_SEL2              (PIN_MUX_CTRL | 10)
#define T2_TUN_AGC_SEL				(PIN_MUX_CTRL | 9)
#define SMART_CARD2_SEL  			(PIN_MUX_CTRL | 8)
#define UART2_RX_SEL				(PIN_MUX_CTRL | 7)
#define UART2_TX_SEL				(PIN_MUX_CTRL | 6)
#define	I2C1_SEL					(PIN_MUX_CTRL | 5)
#define HDMI_HOT_PLUG_SEL			(PIN_MUX_CTRL | 4)
#define SMART_CARD1_SEL				(PIN_MUX_CTRL | 3)
#define UART_RX_SEL			        (PIN_MUX_CTRL | 2)
#define UART_TX_SEL				    (PIN_MUX_CTRL | 1)
#define SPDIF_FUNCTION_SEL			(PIN_MUX_CTRL | 0)


#define SSO_SEL			            (PIN_MUX_CTRL1 | 14)
#define SSO_ERROR_SEL				(PIN_MUX_CTRL1 | 13)
#define SSI4_INTERFACE_SEL			(PIN_MUX_CTRL1 | 12)
#define SSI4_ERROR_SEL				(PIN_MUX_CTRL1 | 11)
#define SSI3_DATA1_SEL				(PIN_MUX_CTRL1 | 10)
#define SSI3_INTERFACE_SEL			(PIN_MUX_CTRL1 | 9)
#define SSI3_ERROR_SEL				(PIN_MUX_CTRL1 | 8)
#define SSI2_DATA1_SEL				(PIN_MUX_CTRL1 | 7)
#define SSI2_INTERFACE_SEL			(PIN_MUX_CTRL1 | 6)
#define SSI2_ERROR_SEL			    (PIN_MUX_CTRL1 | 5)
#define SSI1_DATA1_SEL		        (PIN_MUX_CTRL1 | 4)
#define SSI1_INTERFACE_SEL		    (PIN_MUX_CTRL1 | 3)
#define SSI1_ERROR_SEL		        (PIN_MUX_CTRL1 | 2)
#define SPI_INTERFACE_SEL			(PIN_MUX_CTRL1 | 1)
#define SPI_ERROR_SEL				(PIN_MUX_CTRL1 | 0)



#define NANDFLASH_CI_SHARE_PIN_ENABLE				(PIN_MUX_CTRL2 | 25)
#define NANDFLASH_SF_SHARE_PIN_ENABLE				(PIN_MUX_CTRL2 | 24)
#define EMMC_SEL				                    (PIN_MUX_CTRL2 | 18)
#define SD_8BIT_MODE_SEL					        (PIN_MUX_CTRL2 | 17)
#define SD_INTERFACE_SEL			                (PIN_MUX_CTRL2 | 16)
#define CI_CE_SEL				                    (PIN_MUX_CTRL2 | 12)
#define PK256_NANDFLASH_CS_SEL					    (PIN_MUX_CTRL2 | 11)
#define SFLASH2_CS_SEL					            (PIN_MUX_CTRL2 | 10)
#define SFLASH_HOLDJ_SEL					        (PIN_MUX_CTRL2 | 9)
#define SFLASH_WJ_SEL					            (PIN_MUX_CTRL2 | 8)
#define CI_VCCEN_SEL						        (PIN_MUX_CTRL2 | 6)
#define CI_INTERFACE_SEL			                (PIN_MUX_CTRL2 | 5)
#define PK156_NANDFLASH_CMD_SEL		                (PIN_MUX_CTRL2 | 4)
#define PK256_NANDFLASH_SEL		                    (PIN_MUX_CTRL2 | 3)
#define PK156_NANDFLASH_CS_SEL		                (PIN_MUX_CTRL2 | 2)
#define SFLASH_SEL					                (PIN_MUX_CTRL2 | 1)
#define SFLASH_CS0_SEL					            (PIN_MUX_CTRL2 | 0)



#define HDMI_TEST_SEL			    (PIN_MUX_CTRL3 | 24)
#define I2S_DATA1_SEL			    (PIN_MUX_CTRL3 | 21)
#define I2S_CHANNEL1_SEL			(PIN_MUX_CTRL3 | 20)
#define I2S_DATA3_SEL				(PIN_MUX_CTRL3 | 19)
#define I2S_DATA2_SEL				(PIN_MUX_CTRL3 | 18)
#define PMU_DOCD_TEST_PIN_SEL       (PIN_MUX_CTRL3 | 17)
#define PMU_UART_TEST_PIN_SEL		(PIN_MUX_CTRL3 | 16)
#define TVENC_SYNC_OUTPUT_SEL		(PIN_MUX_CTRL3 | 13)
#define SPDIF_INPUT_TEST_SEL		(PIN_MUX_CTRL3 | 12)
#define SPDIF_OUTPUT_TEST_SEL		(PIN_MUX_CTRL3 | 11)
#define VIDEO_DIGITAL_INPUT_CR_SEL  (PIN_MUX_CTRL3 | 10)
#define VIDEO_DIGITAL_INPUT_CB_SEL	(PIN_MUX_CTRL3 | 9)
#define VIDEO_DIGITAL_INPUT_Y_SEL  	(PIN_MUX_CTRL3 | 8)
#define VIDEO_DIGITAL_INPUT_SEL		(PIN_MUX_CTRL3 | 7)
#define	VIDEO_DIGITAL_OUTPUT_CR_SEL	(PIN_MUX_CTRL3 | 5)
#define VIDEO_DIGITAL_OUTPUT_CB_SEL	(PIN_MUX_CTRL3 | 4)
#define VIDEO_DIGITAL_OUTPUT_Y_SEL	(PIN_MUX_CTRL3 | 3)
#define VIDEO_DIGITAL_OUTPUT_SEL	(PIN_MUX_CTRL3 | 2)
#define USB_TEST_SEL				(PIN_MUX_CTRL3 | 1)
#define TEST_PIN_SEL_ENABLE			(PIN_MUX_CTRL3 | 0)






















#if 0
#define QAM128_ASSI_SEL					(PIN_MUX_CTRL | 30)
#define QAM128_SSI_SEL					(PIN_MUX_CTRL | 29)
#define REVERSE_RMII_SEL				(PIN_MUX_CTRL | 28)
#define RMII_SEL						(PIN_MUX_CTRL | 27)
#define SECOND_ASSI                     (PIN_MUX_CTRL | 26)
#define FIRST_ASSI                      (PIN_MUX_CTRL | 25)
#define SECOND_SSI                      (PIN_MUX_CTRL | 24)
#define FIRST_SSI                       (PIN_MUX_CTRL | 23)
#define SPI_SEL							(PIN_MUX_CTRL | 22)
#define PKG256_CA_SEL					(PIN_MUX_CTRL | 21)
#define SSO_SEL                        	(PIN_MUX_CTRL | 20)
#define PKG256_I2C3_SEL                 (PIN_MUX_CTRL | 19)
#define PKG256_UART_TX_SEL              (PIN_MUX_CTRL | 18)
#define PKQAM_XIFAGC_SEL              	(PIN_MUX_CTRL | 17)
#define PK256_XTUNAGC_SEL              	(PIN_MUX_CTRL | 16)
#define UART2_SEL              			(PIN_MUX_CTRL | 15)
#define I2C2_SEL              			(PIN_MUX_CTRL | 14)
#define PK256_UART_RX_SEL              	(PIN_MUX_CTRL | 13)
#define PKQAM_CA1_SEL              		(PIN_MUX_CTRL | 10)
#define SF128_SEL              			(PIN_MUX_CTRL | 9)

#define NF128_SEL		              	(PIN_MUX_CTRL | 7)
#define PK128_UART_RX_SEL              	(PIN_MUX_CTRL | 6)
#define PK128_UART_TX_SEL              	(PIN_MUX_CTRL | 5)
#define QAM256_DSUB_SEL              	(PIN_MUX_CTRL | 2)


#define MCU_DBG_EN                      (PIN_MUX_CTRL1 | 31)
#define NFLASH_CHIP_EN                  (PIN_MUX_CTRL1 | 21)
#define PK256_SECOND_XSPDIF_SEL         (PIN_MUX_CTRL1 | 19)
#define PK256_IRRX_SEL                  (PIN_MUX_CTRL1 | 18)
#define NMP144_DSUB_SEL                 (PIN_MUX_CTRL1 | 17)
#define AUD_DAC_TEST_SEL                (PIN_MUX_CTRL1 | 16)

#define QAM128_I2C4_sEL               	(PIN_MUX_CTRL1 | 15)
#define DDRPHY1_EJTAG_SEL               (PIN_MUX_CTRL1 | 14)
#define DDRPHY0_EJTAG_SEL               (PIN_MUX_CTRL1 | 13)
#define SWITCH_SPI_RMII_SEL             (PIN_MUX_CTRL1 | 12)

#define IHDMI_OP_RESEN_SEL              (PIN_MUX_CTRL1 | 11)
#define PK128_UART1_RX_AS_UART2_TX_SEL  (PIN_MUX_CTRL1 | 10)
#define PK256_UART1_RX_AS_UART2_TX_SEL  (PIN_MUX_CTRL1 | 9)
#define CI_ENABLE                    	(PIN_MUX_CTRL1 | 8)

#define PK128_I2C3_SEL                 	(PIN_MUX_CTRL1 | 7)
#define I2S_MCLK_SEL                    (PIN_MUX_CTRL1 | 6)
#define PK256_SPDIF_SEL                 (PIN_MUX_CTRL1 | 5)
#define I2C1_SEL                        (PIN_MUX_CTRL1 | 4)

#define HTPG_SEL                        (PIN_MUX_CTRL1 | 3)
#define PK256_I2SI_SEL					(PIN_MUX_CTRL1 | 2)
#define I2SO_SEL                 		(PIN_MUX_CTRL1 | 1)
#define PK128_SPDIF_SEL       			(PIN_MUX_CTRL1 | 0)
#endif



#endif

